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    TSMC's 2nm process node has made a major breakthrough. Wafer prices may rise. Apple's first experience?

    Release Time: 2024-10-06 00:00:00   Click Count:  1456830  【Return】


    On October 5, according to multiple media reports, Taiwan Semiconductor Manufacturing (TSMC) has made a major breakthrough in the 2nm process node. However, the 2nm process will continue to increase in price.


    According to media reports, the price of each 300mm 2nm wafer of TSMC may exceed $30,000, higher than the previous expectation of $25,000, which is twice the price of 4/5nm wafers.


    It is also reported that the first customer to try N2 advanced technology is likely to be the technology giant Apple. In addition, TSMC and chip packaging company Amkor recently announced that the two companies have signed a memorandum of understanding to cooperate on chip production, packaging and testing in Arizona, USA. However, the news has not been confirmed by TSMC.


    Here's a detailed report.


    TSMC suddenly passed a major breakthrough


    According to multiple media reports, TSMC has made a major breakthrough on the 2nm process node and will introduce Gate-all-aroundFETs (GAAFET) transistor technology for the first time. In addition, the N2 process combines NanoFlex technology to provide chip designers with unprecedented flexibility in standard components.


    However, the news has not been confirmed by TSMC.


    Compared to the current N3E process, the N2 process is expected to achieve a 10 to 15 percent performance improvement at the same power, or a 25 to 30 percent reduction in power consumption at the same frequency. Even more remarkable is that the transistor density will be increased by 15%, which marks another leap in TSMC's semiconductor technology field.


    However, with the upgrading of technology, the cost has also risen. It is predicted that the price of each 300mm 2nm wafer of TSMC may break the $30,000 mark, up from the earlier estimate of $25,000. By comparison, the current price range for 3nm wafers is about $18,500 to $20,000, while 4/5nm wafers hover between $15,000 and $16,000. Clearly, the price of 2nm wafers will see significant growth.


    TSMC is building two fabs to make chips using its 2nm-level process technology, and is spending tens of billions of dollars on ultra-expensive EUV lithography equipment (about $200 million per device), among other things. In addition, the N2 process will use a variety of innovative production techniques, which will make TSMC more expensive than N3E. In general, N2 may add more EUV lithography steps, which will increase its cost. For example, TSMC may need to return EUV dual graphics with N2, which will increase its costs, so it is reasonable for foundries to pass these additional costs on to customers.


    Semiconductor industry analysts pointed out that the investment of fabs in advanced manufacturing processes is huge. For example, more than $4 billion has been invested in research and development for 3nm processes, supported by key supply chains. These investments have resulted in significant turnover growth for TSMC and its supply chain partners such as IP providers and related process consumables plants.


    With the exponential increase in advanced process development costs, IC Design executives revealed the change in development costs from 28 nm to 5 nm processes. The 28-nanometer development cost about $50 million, and the 16-nanometer development cost $100 million. When advancing to 5 nanometers, the cost has reached $550 million, including IP licensing, software verification, design architecture and many other aspects. For foundries, the investment is huge. Taking the 3-nanometer process as an example, the research institute believes that it needs to invest $4 billion to $5 billion, and the cost of building a 3-nanometer factory is at least about $15 billion to $20 billion.


    Supply chain operators said that the investment of advanced manufacturing process is a long and resource-consuming process, involving research and development of manpower, equipment, software, materials and other links, and often takes 7 to 10 years. In the case of the 2-nanometer process, the path was quite clear in 2016, but the details of the process were not clear until the recent trial production.


    With the advent of 2-nanometer processes expected in 2025, supply chain companies are expected to see an explosion of profitable growth. In addition, because the 2-nanometer process needs to grind the wafer to thinner, the material has also been cut into the diamond disc and recycled wafers. In terms of regenerated wafers, the output value of 2 nm is about 4.6 times that of 28 nm. With the baffle plate entering the advanced manufacturing process, the number of pieces will be increased accordingly. For the industry, this will be a volume and price of business opportunities.


    TSMC is the world's largest contract wafer manufacturer, providing services such as chip manufacturing and advanced packaging technology to customers such as Apple and Nvidia. In terms of results, TSMC consolidated revenue in the second quarter was NT $673.51 billion, up 40.1% year on year and higher than analysts' expectations. Net profit rose 36.3 per cent to NT $247.85 billion, also beating expectations.


    TSMC's August sales rose about 33 per cent from a year earlier to T $250.87 billion. So far in the third quarter, TSMC's revenues have reached 68 per cent of jpmorgan's expectations, the bank said. The company's strong sales in August suggest third-quarter results could beat its guidance. The bank maintained an "overweight" rating on the stock with a target of T $1,200.


    In the secondary market, TSMC's share price has risen nearly 65% this year, and its latest market value is NT $25.34 trillion, equivalent to about 5.5 trillion yuan.


    A first for Apple?


    According to reports, TSMC has planned the N2 process to officially enter the mass production stage in the second half of 2025, and customers are expected to receive the first chips manufactured using the N2 process by 2026 at the earliest. The first customer to try this advanced process is likely to be tech giant Apple.


    If the $30,000 per wafer quote is accurate, it remains to be seen whether using N2 instead of N3 - which improves performance and reduces power consumption while achieving 15% transistor density - will make much economic sense for all TSMC customers. Apple is preparing to use N2 in the second half of 2025, as it needs to improve processors for iphones, ipads, and Macs every year (though those products are only expected to get N2 chips in 2026). Other large customers usually catch up with Apple in 1.5-2 years, so the offer may be a little lower by then.


    TSMC and chip packaging company Amkor announced on Thursday that the two companies have signed a memorandum of understanding to collaborate on chip production, packaging and testing in Arizona, the United States.


    The two companies said in a press release that their Arizona facility is very close and will speed up the entire chip manufacturing process. Under the agreement, TSMC will use the Turnkey advanced packaging and testing services from Amkor's planned new facility in Peoria, Arizona. TSMC will leverage these services to support its customers, particularly those using TSMC's advanced wafer manufacturing facility in Phoenix. The close collaboration between TSMC's front fab in Arizona and Amkor's close to the back fab will shorten the overall product lead time.


    TSMC's earlier commitment to build a $40 billion chip manufacturing plant in Phoenix, Arizona, laid the groundwork for the Amkor deal.


    Apple confirmed last year that Amkor would package Apple Semiconductor Icon chips made at a nearby TSMC plant. Tech reporter TimCulpan recently reported that TSMC's U.S. plant has begun small-scale production of the A16 chip, which debuted in the iPhone 14 Pro model two years ago and is also used in the iPhone 15 and iPhone 15 Plus models.


    Article source: Brokerage China